If consider of process of moving data from the processor to an external device

If consider of process of moving data from the processor to an external device, in that process the system needs to write data to the external device.
So, we can the following example will illustrate the steps involved in transferring data from the processor to an external device.
? The first step of the process of the processor examines the I/O module for its status.
? I/O module returns the device status ready to operating data transmission.
? Processor process and issue command for the I/O module asking to read the data.
? Finally, I/O module gains the data from the processor and those data are transfer to the external device by I/O module.
Byte addressing is referred to hardware architectures which support accessing individual bytes of data rather than only large units called words, in which should be word-addressable. Such computers are sometimes called byte machines.
So, the advantages of byte-addressability are clear when we consider applications that process data one byte at a time. Access of a single byte in a byte-addressable system requires only the issuing of the single address. In a 16–bit word addressable system, it is necessary first to count the address of the word containing the byte, fetch that word, and then extract the byte from the two-byte word. Although the processes for byte extraction are well understood, they are less efficient than directly accessing the byte. For this reason, many modern machines are byte addressable.
Then, consider word addressable memory, considering word being 4 bytes, you can read an “address” and you will get word of data i.e. 4 bytes. When you read “address”, you will read the next 4 bytes. If you look into the build of memory and how to address is decoded to find a memory location, this will become clearer. Depending on what kind of memory it is (byte or word addressable), there will be the different amount of address bits used for index, tag, offset.
Intel 8086 processor was introduced on June 8, 1978. This processor refers to microprocessors developed by Intel Corporation, which was used by IBM personal computers (XT, 1981).
The Intel 8086 is a 16-bit microprocessor intended to be used as the CPU in a microcomputer. The term “16-bit” means that its arithmetic logic unit, internal registers, and most of its instructions are designed to work 16-bit binary words. It has a 16-bit data bus and a 20-bit address bus.
The width of the bus is 16 bits and uses 20-bit addresses. The processor consists of 29,000 transistors. The performance of 8086 is 10 times the performance of the 8080 processor.
Words will be stored in two consecutive memory locations. If the first byte of a word is at an even address, the 8086 can read the entire word in one operation. If the first byte of the word is at an odd address, the 8086 will read the first byte in one operation, and the second byte in another operation.
The 8086/8088 microprocessor consists of four functional units.
1) The execution unit (EU): decodes and executes machine instructions.
2) Arithmetic and logic unit (ALU): performs math and logical operations on command by the EU.
3) Internal storage (sometimes called registers): is used for internal data storage.
4) Bus interface unit (BIU): handles all communications with the I/O via the system bus and maintains instruction queue.
Extra segment (ES) is possible to change default segments used by general and index registers by prefixing instructions with a CS, SS, DS or ES prefix.
Both units operate asynchronously to give the 8086 an overlapping instruction fetch and execution mechanism which is called as Pipelining. This results in efficient use of the system bus and system performance.
BIU contains Instruction queue, Segment registers,
Instruction pointer, Address adder.
EU contains Control circuitry, Instruction decoder, ALU, Pointer and Index register, Flag register.
8086 CPU has 8 general purpose registers, each register has its own name:
AX – the accumulator register (divided into AH / AL):
Generates shortest machine code
Arithmetic, logic and data transfer
One number must be in AL or AX
Multiplication & Division
Input & Output
BX – the base address register (divided into BH / BL).
CX – the count register (divided into CH / CL):
Iterative code segments using the LOOP instruction
Repetitive operations on strings with the REP command
Count (in CL) of bits to shift and rotate
DX – the data register (divided into DH / DL):
DX: AX concatenated into the 32-bit register for some MUL and DIV operations
Specifying ports in some IN and OUT operations
SI – source index register:
Can be used for pointer addressing of data
Used as a source in some string processing instructions
Offset address relative to DS
DI – destination index register:
Can be used for pointer addressing of data
Used as a destination in some string processing instructions
Offset address relative to ES
BP – base pointer:
Primarily used to access parameters passed via the stack
Offset address relative to SS
SP – stack pointer:
Always points to top item on the stack
Offset address relative to SS
Always points to word (byte at even address)
Question 2
A computer control unit is the control unit that is a part of the computer processor and the Control Unit is considered to be the brain of the CPU. The control unit fetches internal instructions of programs from the main memory to the processor instruction register and, based on this register contents, generates control signals that supervise the execution of these instructions. The Control Unit operates based
on the instructions it decodes and decides how other parts of the CPU and the rest of
the computer systems should work in order that the instruction gets executed in a
Correct manner. The control signals are distributed to all the smaller and larger elements of the computer that participate in the execution of instructions and need to be controlled. The control signals are usually transmitted by the part of the overall system bus called the control bus.
Control Unit Microarchitecture
There are two types of control units, the first type is called a hardwired control unit. Hardwired control units are constructed using digital circuits and once formed cannot be changed. The other type of control unit is a microprogrammed control unit. A microprogrammed control unit itself decodes and execute instructions by means of executing microprograms.
So, when executing microprograms, the microprogrammed control unit decodes and execute instructions. A sequence of instructions will create complex operations, and the sequencing of such instructions are called micro-programming or firmware
The control unit generates a set of control signals, where each control signal indicates
‘on’ or ‘off’, thus represented by a bit.
b) Multiprocessing is a term applied for interconnecting two or more central processing units in a single computer. Especially it increasing computer power. When used with this definition, multiprocessing is sometimes not compared with multitasking, which may use just a single processor but switch it in time slices between tasks. (I.e. a time-sharing system).
A multiprocessor is regarded as a means to improve computing speeds, performance, and cost-effectiveness, as well as to provide promote availability and reliability.
c) Single Instruction Multiple Data (SIMD) is a class of parallel computers in Flynn’s taxonomy. SIMD describes computers with multiple processing elements that perform the same operation on multiple data points simultaneously. So, such machines exploit data level parallelism.
In this case, Vector Processors belongs to the SIMD execution model. A vector processor, or array processor, is a CPU design that is able to run mathematical operations on multiple data elements simultaneously. This is in contrast to a scalar processor which handles one element at a time. Most of the CPUs are scalar.
Advantages of Shared Memory Multiprocessors
? Performance
Some work can be done in parallel
? Availability
Since all processors can perform the same functions, failure of a single processor doesn’t halt the system.
? Incremental growth
User can enhance performance by adding additional processors.
? Scaling
Vendors can offer range of products based on number of processors.
Question 3
Volatile Memory
Volatile Memory is a type of memory in which data contained in the memory is lost whenever the power is turned off.
It is a type of temporary memory which isn’t capable of storing the content permanently.
Non-Volatile Memory
It is a type of memory in which data is not lost in case of power failure or turning off the system abruptly.
That is a type of a permanent memory in which the content is stored in a permanent manner in every situation.
Volatile Memory Examples = RAM or Random Access Memory
Non-Volatile Memory Examples = ROM
Static RAM (SRAM)
Dynamic RAM (DRAM)
? SRAM uses transistor to store a single bit of data.
? DRAM uses a separate capacitor to store each bit of data
? SRAM does not need periodic refreshment to maintain data.
? DRAM needs periodic refreshment to maintain the charge in the capacitors for data
? SRAM are faster than DRAM
? DRAM are slower than SRAM
? SRAM are used in cache memory
? DRAM are used in Main memory.
The locality of reference, also known as the principle of locality, it is a term for the phenomenon in which the same values, or related storage locations, are frequently accessed, depending on the memory access pattern.
When mapping these principles to the way the programs operate, it is possible as to state that the program accesses a relatively small portion of its address space at any instance of time. This principle of locality is therefore implemented in the memory of the computer as the ‘memory hierarchy’. The memory hierarchy consists of multiple levels of memory with different speeds and sizes. The faster memories are smaller and closer to CPU. As the level of memory moves away from the CPU it becomes slower.
Write-through cache is the every writes operation to the cache is accompanied by a write of the same data to main memory. When this is accomplished, then the input/output processor need not consult the cache directory when it reads memory since the state of main memory is an actual reflection of the state of the cache as updated by the central processor. Although this scheme simplifies the accesses for the input/output processor, it results in fairly high traffic between central processor and memory, and the high traffic tends to degrade input/output performance.
Write-back cache (write-in) is the central processor updates the cache during a write, but actual updating of the memory is deferred until the line that has been changed is discarded from the cache. At that point, the changed data are written back to main memory. Write-back caching benefit somewhat better performance than write-through caching because it reduces the number of write operations to main memory. With this performance improvement comes a small risk that data may be lost if the system crashes.
Memory hierarchy a concept that is necessary for the CPU to be able to manipulate data. Because it is only able to get instructions from cache memory. Cache memory is located on the processor chip, and it is the fastest kind of memory. As a result of this, it is also the smallest, meaning that we can’t hold all of our processes in it at once. So we use RAM. RAM is much larger than cache memory, but not located directly on the CPU, so it is very slower. Instructions are loaded into RAM until the CPU needs them. They are only held as long as power is supplied, and this is why we need Disk memory. Disk memory is what holds all of our files and programs when not in use. It is the memory we are all most familiar with.
Memory Hierarchy lets us have the best of both worlds – speed and size. You have a small amount of ultra-fast memory, a larger amount of slower memory, and a huge amount of very slow memory. By cleverly choosing what data to store in which type of memory, we can appear to have a huge amount of very fast memory. Then that is the very important task of it.